1. Field of the Invention
This invention relates in general to magnetic storage systems, and more particularly to a method and apparatus for a method and apparatus for providing matched differential MR biasing and pre-amplification.
2. Description of Related Art
Magnetic recording systems that utilize magnetic disk and tape drives constitute the main form of data storage and retrieval in present-day computer and data processing systems. In the recording process, information is written and stored as magnetization patterns on the magnetic recording medium. Scanning a write head over the medium and energizing the write head with appropriate current waveforms accomplish this recording process. In a read-back process, scanning a read sensor over the medium retrieves the stored information. This read sensor intercepts magnetic flux from the magnetization patterns on the recording medium and converts the magnetic flux into electrical signals, which are then detected and decoded.
In high capacity storage systems, magnetoresistive read sensors, commonly referred to as MR heads, are the prevailing read sensor because of their capability to read data from a surface of a recording medium at greater track and linear densities than thin film inductive heads. An MR sensor detects a magnetic field through the change in resistance of its MR sensing layer (also referred to as an “MR element”) as a function of the strength and direction of the magnetic flux being sensed by the MR layer.
The changes in resistance of the MR element in response to magnetic data recorded on a storage media surface is amplified in the read/write chip (also referred to as the arm electronics (AE) module) on the actuator arm before transmission to the external electronics. The frequency response of the pre-amplifier in the AE module, and in particular its high frequency bandwidth, determines the data rate capability of the disk drive. The high frequency bandwidth of the system comprising the MR element, pre-amplifier and interconnects is a function of the MR element resistance. MR element resistances generally have a range of values due to manufacturing variations and tolerances. The resistance of a single MR element may also change due to temperature or other conditions in the disk drive during manufacturing and use.
The present trend in the storage industry is ever increasing areal density which demands very efficiently designed small MR data sensing elements. This requires an improved power efficiency for the application of the MR head. The differential bias voltage across the element needs to be very low and the tolerance of the design to be accordingly small. For example, the bias voltage requirement can be as low as 50 m volts with 5% of tolerance. Centering of the differential bias voltage to the ground level is also very desirable for preventing extra current surging across the sensing element due to accidental contacts of the MR element to other voltage neutralized (grounded) parts within the storage device enclosure. Transient voltages developed across an MR element due to unstable voltages within the differential amplifier circuits should also be minimized for protection of the element. These unstable voltages can occur due to closed-loop transients of a commonly used Common-Mode control loop and its interactions with other amplification control loops, as implemented with many existing solutions. Minimized transient voltages are required to improve write-to-read transient recovery operations as well as for the protection of the MR heads.
Another goal is to concurrently provide controlled input impedance differential pre-amplification with the tightly controlled MR bias. Controlled and relatively low input impedance of an amplification circuit would reduce the effect of parasitic capacitance for limiting the bandwidth, and would match the source-end characteristic-impedance better in the flexible cable connection for the MR sensor which is generally a low resistance value. Furthermore, an efficient control of intrinsic noise in the signal amplification path without demanding extra power for lowering the source resistance of the gain stage is needed.
U.S. Pat. No. 5,701,213 presents a MR biasing circuit with a common-mode feedback control loop for an indirect setting and control of the bias voltage at the MR element. It can often cause unstable voltage transients in either common mode or differential mode due to loop transients or interactions with the gain stage control loop. The unstable voltages can induce extended time transients for Write to Read recovery and cause destruction to a power sensitive high-track-density MR head. U.S. Pat. No. 5,204,789 also uses a common-mode feedback loop. An open-loop MR biasing circuit is presented by U.S. Pat. No. 5,812,019 for a high impedance input MR amplification. U.S. Pat. No. 5,812,019 uses a pair of PNP transistors for establishing the bias, but the general PNP transistors in a BiCMOS IC processing have very poor beta (current gain), which will contribute more offset to the unmatched currents for establishing the bias. The use of unmatched currents for establishing the bias voltages can be also seen as in U.S. Pat. No. 5,856,891 for a high impedance input MR amplifier.
It can then be seen that there is a need for a method and apparatus for providing matched differential MR biasing and pre-amplification.